Reliable routing schemes in 3D network on chip
by Habib Chawki Touati; Fateh Boutekkouk
International Journal of Embedded Systems (IJES), Vol. 12, No. 1, 2020

Abstract: 3D network on chip (3D-NoC) is the replacement of traditional infrastructures and the new design paradigm for communication in future very large-scale system on chip (SoC), due to the fact that it provides flexibility, extensibility and low power consumption. One of the most important issues of a 3D-NoC design is the implementation of an efficient and reliable routing algorithm, which has a direct impact on the overall network performance. A routing algorithm aims predominantly at fulfilling three distinct objectives: deadlock freedom, congestion awareness and fault tolerance, which is a highly desired but somewhat a challenging task. In this paper, a non-exhaustive list of the most relevant routing algorithms in 3D-NoC are surveyed and classified based on their objectives, the advantages and drawbacks of each algorithm are also presented, as well as the possible enhancements to improve their reliability.

Online publication date: Mon, 24-Feb-2020

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