Horizontal and vertical HW/SW co-design flows for power aware smart card designs
by M. Grumer, Ch. Steger, M. Wendt, A. Muehlberger, U. Neffe
International Journal of Embedded Systems (IJES), Vol. 3, No. 1/2, 2007

Abstract: This paper presents a HW/SW co-design methodology for the design of resource limited embedded devices. The design methodology takes advantage of system abstraction and attached vertical and horizontal co-design flows. The vertical co-design flow focuses on a system consisting of a standard processor and a custom hardware as co-processor. The horizontal co-design flow implements the system's functionality entirely in software, but the underlying processor is developed at the same time. The focus of the paper is on the detailed description of the two design flows under the aspect of power awareness.

Online publication date: Sun, 02-Dec-2007

The full text of this article is only available to individual subscribers or to users at subscribing institutions.

 
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.

Pay per view:
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.

Complimentary Subscribers, Editors or Members of the Editorial Board of the International Journal of Embedded Systems (IJES):
Login with your Inderscience username and password:

Username:        Password:          Forgotten your password?

Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.

If you still need assistance, please email subs@inderscience.com