Parallel processing for block ciphers on a fault tolerant networked processor array
by Yoon Seok Yang, Jun Ho Bahn, Seung Eun Lee, Jungsook Yang, Nader Bagherzadeh
International Journal of High Performance Systems Architecture (IJHPSA), Vol. 2, No. 3/4, 2010

Abstract: The computational performance of network-on-chip (NoC) and multi-processor system-on-chip (MPSoC) for implementing cryptographic block ciphers can be improved by exploiting parallel and pipelined execution. In this paper, we present a parallel and pipeline processing method for block cipher algorithms using purely software implementation on an NoC. Algorithms are decomposed into task loops, functions and data flow for parallel and pipeline execution. Tasks are allocated by the proposed mapping strategy to each processing element (PE). In order to provide fault tolerance on nanoscale NoC circuits, we add Hamming error correction code (ECC) encoder and decoder at the network interface. The proposed parallel block cipher algorithm implementation on the fault tolerant NoC is simulated by using networked processor array (NePA), the cycle-accurate SystemC and hardware description language (HDL) model platform. Our parallel software implementation method on a multicore NoC architecture has the advantage of flexibility compared with traditional ASIC solutions. In addition, the simulation result presents that the parallel and pipeline processing approach for software block ciphers can be implemented on various NoC platforms which have different complexities and constraints.

Online publication date: Sat, 07-Aug-2010

The full text of this article is only available to individual subscribers or to users at subscribing institutions.

 
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.

Pay per view:
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.

Complimentary Subscribers, Editors or Members of the Editorial Board of the International Journal of High Performance Systems Architecture (IJHPSA):
Login with your Inderscience username and password:

Username:        Password:          Forgotten your password?

Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.

If you still need assistance, please email subs@inderscience.com