Simulation analysis of semiconductor manufacturing with small lot size and batch tool replacements Online publication date: Wed, 22-Oct-2014
by Kilian Stubbe, Oliver Rose
European J. of Industrial Engineering (EJIE), Vol. 5, No. 3, 2011
Abstract: Long cycle times in semiconductor manufacturing represent an increasing challenge for the industry and lead to a growing need for breakthrough approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. However, there is still a lack of comprehensive and meaningful studies. In this paper, we present results of our modelling and simulation assessment. Our simulation analysis shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools lead to significant reductions in cycle time but the effectiveness of lot size reduction is questionable if reduced by more than half. [Received: 02 June 2009; Revised: 24 November 2009, 04 February 2010; Accepted: 08 February 2010]
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.Complimentary Subscribers, Editors or Members of the Editorial Board of the European J. of Industrial Engineering (EJIE):
Login with your Inderscience username and password:
Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.
If you still need assistance, please email subs@inderscience.com