Memory power optimisation on low-bit multi-access cross memory address mapping schema Online publication date: Thu, 31-Jul-2014
by Zongwei Zhu; Xi Li; Chao Wang; Xuehai Zhou
International Journal of Embedded Systems (IJES), Vol. 6, No. 2/3, 2014
Abstract: Since memory accounts for an increasing fraction of computer energy, manufacturers have developed memory devices with different power/work modes and lots of creditable power mode control algorithms have been proposed. By analysing these policies on different memory address mapping schemas (schema is used to translate a physical address to a memory cell), we find they are less effective on low-bit multi-access cross memory (LMCM) schema which is a fine-grained interleaving schema to improve parallelism to meet high-bandwidth. For gaining more power efficiency, we introduce a comprehensive solution named as MSPA. It adopts a memory address segmentation module (MASM) to split memory into many regions configured as different schemas. With the help of an OS power-aware memory allocator (PAMA), MSPA can allocate one applications memory from its preferred region to balance power and performance. Finally, by integrating some outstanding works, experimental results demonstrate that it can further improve power efficiency from 3% to 17%.
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