Title: Investigation on the optimisation of Cholesky decomposition algorithm based on SIMD-DSP

Authors: Huixiang Li; Huifu Zhang; Anxing Xie; Yonghua Hu; Wei Liang

Addresses: Hunan Key Laboratory for Service computing and Novel Software Technology, School of Computer Science and Engineering, Hunan University of Science and Technology, Xiangtan, China ' Hunan Key Laboratory for Service computing and Novel Software Technology, School of Computer Science and Engineering, Hunan University of Science and Technology, Xiangtan, China ' Hunan Key Laboratory for Service computing and Novel Software Technology, School of Computer Science and Engineering, Hunan University of Science and Technology, Xiangtan, China ' Hunan Key Laboratory for Service computing and Novel Software Technology, School of Computer Science and Engineering, Hunan University of Science and Technology, Xiangtan, China ' Hunan Key Laboratory for Service computing and Novel Software Technology, School of Computer Science and Engineering, Hunan University of Science and Technology, Xiangtan, China

Abstract: With the development of high-performance SIMD-DSP processors, corresponding highly efficient algorithms for matrix decomposition play an important role in the hardware performance of such processors. Cholesky decomposition is a fast decomposition method for symmetric positive definite matrices, which is widely used in matrix inversion and linear equation solving. According to the hardware characteristics of the FT-M7002 processors, in this paper, we optimise the algorithm in several ways. If hardware has on-chip double-buffered memory, the parallel process of DMA transmitting and calculating is specially designed, which can hide most of the time cost of data movement and further improve the algorithm's performance. The experimental results based on the FT-M7002 processor show that the performance of the optimised algorithm is 3.8~5.64 times that of the serial algorithm, and 1.39~2.14 times that of the TI library function.

Keywords: Cholesky decomposition; digital signal processor; DSP; single instruction multiple data; SIMD.

DOI: 10.1504/IJCSE.2024.136248

International Journal of Computational Science and Engineering, 2024 Vol.27 No.1, pp.28 - 35

Received: 17 Mar 2022
Received in revised form: 17 Jul 2022
Accepted: 18 Jul 2022
Published online: 25 Jan 2024 *

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