Title: Simultaneous double side grinding of silicon wafers: a mathematical model for the wafer shape

Authors: Z.C. Li, Z.J. Pei, Graham R. Fisher

Addresses: Department of Industrial and Manufacturing Systems Engineering, Kansas State University, Manhattan, KS 66506, USA. ' Department of Industrial and Manufacturing Systems Engineering, Kansas State University, Manhattan, KS 66506, USA. ' MEMC Electronic Materials, Inc., 501 Pearl Drive, St. Peters, MO 63376, USA

Abstract: Silicon wafers are the most widely used substrates for fabricating Integrated Circuits (ICs). The quality of ICs depends directly on the quality of silicon wafers. Simultaneous Double Side Grinding (SDSG) is one of the processes used to flatten the sliced wafers. The literature contains several mathematical models for the wafer shape in Single Side Grinding (SSG). However, no systematical study on the wafer shape in SDSG has been reported. The first part of this paper gives an overview of current mathematical models for the wafer shape in SSG (or SDSG) of silicon wafers. Then a mathematical model for the wafer shape in SDSG of silicon wafers is developed. This developed model is then used to systematically study the effects of several SDSG parameters on the wafer shape.

Keywords: simultaneous double side grinding; SDSG; machining; semiconductor materials; silicon wafers; wafer shape; mathematical modelling.

DOI: 10.1504/IJNM.2008.023173

International Journal of Nanomanufacturing, 2008 Vol.2 No.6, pp.556 - 571

Published online: 12 Feb 2009 *

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