Title: A synergetic operating unit on NoC layer for CMP system

Authors: Xiongli Gu, Peng Liu, Zhiyuan Xu, Bingjie Xia, Cheng Li, Qingdong Yao, Ce Shi

Addresses: Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China

Abstract: Coarse grain data flow graph (CGDFG) model based on message passing mechanism guides the parallel programming for the chip multiprocessor (CMP) system with distributed memory in our work. Parallel threads are exploited, encapsulated in objects and mapped onto the different processors according to the CGDFG principles. Efficient scheduling and synchronisation mechanisms with lower overhead are needed to maintain the processors running objects concurrently and synchronously. A hardware/software approach – synergetic operating unit (SOU) is proposed in this paper to manage the object scheduling and synchronisation for the lightweight CMP system. Compared with the original software approach this solution reduces the run-time object scheduling and synchronisation overhead effectively, thereby, meeting the requirements of running hard real-time applications. The hardware synergetic operating unit is situated in the link/network layer of networks-on-chip (NoC), which takes up about 14.5% area of the NoC and can run at a clock rate of 1,176 MHz (TSMC90 CMOS process technology). These two points make the SOU module to be easily integrated as a sub net of the NoC for CMP system.

Keywords: coarse grain data flow graph; CGDFG; chip multiprocessor systems; CMP systems; real-time operating systems; RTOS; parallel programming; scheduling; synchronisation; network-on-chip; NoC.

DOI: 10.1504/IJHPSA.2010.034536

International Journal of High Performance Systems Architecture, 2010 Vol.2 No.3/4, pp.145 - 155

Received: 30 Sep 2009
Accepted: 13 Mar 2010
Published online: 07 Aug 2010 *

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