Title: Network interface design based on mutual interface definition
Authors: Bingjie Xia, Kejun Wu, Chunchang Xiang, Mei Yang, Peng Liu, Qingdong Yao
Addresses: Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' NVIDIA Research Center, Building 9, Zhangjiang Hi-Tech Park, No. 399, Keyuan Road, Shanghai, 201203, China. ' Department of Electrical and Computer Engineering, University of Nevada, 4505 Maryland Parkway, Box 454026, Las Vegas, NV 89119, USA. ' Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China. ' Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China
Abstract: This paper proposes a novel network interface design method, referred to as mutual interface definition based method. It decouples resource dependent part (RDP) from resource independent part (RIP) by mutual interface definition. These two parts can be designed independently, thus the design flexibility and reusability of network interface can be enhanced. Moreover, a network interface component library consisting of multiple RDP and RIP components is proposed to be built. The networks-on-chip designers can choose appropriate components from the library to construct network interface design. From the perspective of RDP, the network interface achieves backward compatibility with the existing protocols such as AMBA AHB and OCP. From the perspective of RIP, the network interface provides a configurable structure supporting multicast transfer and adaptive routing algorithm extensions. The proposed network interface designs are implemented in TSMC 90-nm CMOS standard cell technology and can work at the frequency of 1.12 GHz to 1.35 GHz.
Keywords: network-on-chip; NoC; network interface design; resource dependent part; resource independent part.
DOI: 10.1504/IJHPSA.2010.034538
International Journal of High Performance Systems Architecture, 2010 Vol.2 No.3/4, pp.168 - 176
Received: 30 Sep 2009
Accepted: 05 Jan 2010
Published online: 07 Aug 2010 *