Title: Simulation analysis of semiconductor manufacturing with small lot size and batch tool replacements

Authors: Kilian Stubbe, Oliver Rose

Addresses: Institute of Applied Computer Science, Dresden University of Technology, Dresden, 01062, Germany. ' Institute of Applied Computer Science, Dresden University of Technology, Dresden, 01062, Germany

Abstract: Long cycle times in semiconductor manufacturing represent an increasing challenge for the industry and lead to a growing need for breakthrough approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. However, there is still a lack of comprehensive and meaningful studies. In this paper, we present results of our modelling and simulation assessment. Our simulation analysis shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools lead to significant reductions in cycle time but the effectiveness of lot size reduction is questionable if reduced by more than half. [Received: 02 June 2009; Revised: 24 November 2009, 04 February 2010; Accepted: 08 February 2010]

Keywords: semiconductor manufacturing; simulation analysis; small lot sizes; batch tool replacements; mini-batch tools; single-wafer tools; lot sizing; cycle times; modelling.

DOI: 10.1504/EJIE.2011.041618

European Journal of Industrial Engineering, 2011 Vol.5 No.3, pp.292 - 312

Published online: 22 Oct 2014 *

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