Title: FinFET-based 6T SRAM cell design: analysis of performance metric, process variation and temperature effect

Authors: Ravindra Singh Kushwah; Shyam Akashe

Addresses: Department of Electronics & Communication, Institute of Technology and Management University, Gwalior 474001, MP, India ' Department of Electronics & Communication, Institute of Technology and Management University, Gwalior 474001, MP, India

Abstract: In this paper, we have proposed a FinFET-based 6T Static Random Access Memory (SRAM) cell. The proposed FinFET-based 6T SRAM cell offers better stability in terms of Static Noise Margin (SNM) and Read Noise Margin (RNM). During the read operations, SRAM cell stability analysis is based on the SNM because many memory errors may occur. Since SNM changes with each cell operation, a complete analysis of SNM in read mode is required. In this paper, we have looked into the SRAM cell SNM during read mode analysing various options to improve cell stability. These techniques are based on the transistor width, word-line, bit-line and supply voltage modulations. We showed that it is possible to improve the stability of SRAM cell during read operations, while reducing word-line voltage which reduces the leakage current. We have also analysed the temperature effect on SNM, leakage current and leakage power for FinFET-based SRAM cell.

Keywords: FinFET; fin FETs; field effect transistors; stability; static noise margin; read noise margin; SRAM cells; static RAM; random access memory; performance measurement; process variation; temperature effect; transistor width; word line; bit line; supply voltage modulation; leakage current; leakage power.

DOI: 10.1504/IJSISE.2015.072923

International Journal of Signal and Imaging Systems Engineering, 2015 Vol.8 No.6, pp.402 - 408

Received: 08 Mar 2013
Accepted: 27 Feb 2014
Published online: 08 Nov 2015 *

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