Title: Analysis of power consumption and delay of an inverter circuit using TMJLSRG MOSFET for the design of digital integrated circuit

Authors: Surajit Bari; Debashis De

Addresses: Electronics and Communication Engineering Department, Narula Institute of Technology, 81, Nilgunj Road, Agarpara, Kolkata – 700109, West Bengal, India ' Department of Computer Science and Engineering, Maulana Abul Kalam Azad University of Technology, West Bengal, BF 142, Sector 1, Salt Lake City, Kolkata – 700064, West Bengal, India

Abstract: This paper represents delay and power analysis of an inverter using a triple-material junctionless surrounding gate MOSFET (TMJLSRG) to design integrated circuit. TCAD tools have been used for the purpose of simulation. The delay and power consumption are the vital design metrics to design the circuit in nano level. In this work, the variation of power consumption has been reported for different values of power supply voltage VDD and channel length. Delay is also reported with respect to VDD .Moreover, power consumption has been reported for the gate engineered device for different ratio of gate length. The results are satisfactory to design low power and high speed digital integrated circuit using TMJLSRG MOSFET.

Keywords: inverter; power; delay; integrated circuit; gate engineered; TMJLSRG MOSFET.

DOI: 10.1504/IJNP.2018.092682

International Journal of Nanoparticles, 2018 Vol.10 No.1/2, pp.117 - 123

Received: 09 Jan 2018
Accepted: 12 Jan 2018
Published online: 27 Jun 2018 *

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