A page weight-based replacement algorithm to enhance the performance of buffer management in flash memory Online publication date: Mon, 19-Feb-2024
by Shweta; P.K. Singh
International Journal of Grid and Utility Computing (IJGUC), Vol. 15, No. 1, 2024
Abstract: Flash memory is used in various electronic handheld devices such as laptops and PDAs as secondary storage because of its excellent performance, low energy consumption, compact size, high-access speed and resistance to shock with growing density and lowering prices. However, the intrinsic properties, such as no in-place update and asymmetric I/O operations, provide challenges to designing buffer replacement strategies. This paper suggests an improved buffer management strategy called the Page Weight Buffer Replacement (PWBR) algorithm for flash memory, which considers buffers' page weight. An eviction approach is applied which tries to minimise the number of write counts and maintain a higher buffer hit rate by integrating recency, operational cost and temporal locality. Our finding shows PWBR is superior to existing buffers' management policies in terms of increasing the hit ratio of LRU-WSR, CF-LRU, CCF-LRU and AD-LRU by 9.3%, 6.4%, 3.7% and 2.5% higher, respectively.
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