A compact abstraction of manufacturing nodes in a supply network
by Brett M. Duarte, John W. Fowler, Kraig Knutson, Esma Gel, Dan Shunk
International Journal of Simulation and Process Modelling (IJSPM), Vol. 3, No. 3, 2007

Abstract: This paper presents the abstraction process to support a modular approach for simulating semiconductor supply networks by modelling each node in the network as a 'Functional Block'. In particular, a functional block to represent wafer fabrication facilities is developed, which strikes a suitable balance between a high level abstraction and modelling the detailed complexities of a manufacturing facility. We demonstrate that the model is able to produce performance estimates (average Cycle Time (CT) and Throughput (TH)) that resemble the behaviour of real-life systems and are accurate with respect to comparisons with a detailed Discrete Event Simulation (DES) model.

Online publication date: Fri, 28-Sep-2007

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